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| author | Garmin Chang <Garmin.Chang@mediatek.com> | 2022-09-11 21:12:16 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-14 11:56:03 +0000 |
| commit | d9b1dfe96806bd1985c722fd52f7dbf83a960f0f (patch) | |
| tree | 7e5af0d76b5631ce10c1e8bb66df0fd412a5dcb7 /src/soc/rockchip/rk3288/crypto.c | |
| parent | d522f38c7bfccdc4af71bcad133aec20096f3f6c (diff) | |
soc/mediatek/mt8188: Fix some wrong settings for PLLs
The observed CPU big core frequency is double compared with the current
PLL setting. Therefore fix the wrong setting for PLL register
APMIXED_ARMPLL_BL.
Moreover, we also fix some wrong settings for other PLLs.
TEST=CPU frequency of big core CPU is correct and bootup correctly.
BUG=b:244215537
Signed-off-by: Garmin Chang <Garmin.Chang@mediatek.com>
Change-Id: I9126f439d7a5136b2fb8d66f103ef427a0b08a99
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67543
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/crypto.c')
0 files changed, 0 insertions, 0 deletions