diff options
| author | jinkun.hong <jinkun.hong@rock-chips.com> | 2014-07-31 14:50:49 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-24 15:24:19 +0100 |
| commit | 503d12191d11858ec59a0cceb585e8e675c9e907 (patch) | |
| tree | 21765231aef251d7c4690bb3cf8525a61157a2b2 /src/soc/rockchip/rk3288/cpu.h | |
| parent | 338c617cc5f840bf3ef17f45652108acd30d729f (diff) | |
rk3288: add clock module
Call rkclk_init() in bootblock stage.
apll = 816MHz, gpll = 594MHz, cpll = 384MHz, dpll = 300MHz
arm clk = 816MHz, DDR clk = 300MHz, mpclk = 204MHz, m0clk = 408MHz
l2ramclk = 408MHz, atclk = 204MHz, pclk_dbg = 204MHz
aclk = 148.5MHz, hclk = 148.5MHz, pclk = 74.25MHz
BUG=chrome-os-partner:29778
TEST=Build coreboot
Change-Id: Id5967712e25df5be3a90f5d9ebe8671034deff68
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d35d9fe7b5925291e9303e5eb21d20dbbdee99d9
Original-Change-Id: I97d953258039f6caa499cef4462be8f1a05ce2ab
Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209428
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/8858
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/rockchip/rk3288/cpu.h')
| -rw-r--r-- | src/soc/rockchip/rk3288/cpu.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/cpu.h b/src/soc/rockchip/rk3288/cpu.h new file mode 100644 index 0000000000..ed629c975f --- /dev/null +++ b/src/soc/rockchip/rk3288/cpu.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_ROCKCHIP_RK3288_CPU_H__ +#define __SOC_ROCKCHIP_RK3288_CPU_H__ + +#define RK_SETBITS(val, msk) (((msk) << 16) | (val)) + +#endif /* __SOC_ROCKCHIP_RK3288_CPU_H__ */ + |