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authorhuang lin <hl@rock-chips.com>2014-09-27 12:02:27 +0800
committerAaron Durbin <adurbin@google.com>2015-04-02 21:16:28 +0200
commitbbcffd9e25e12a8ee5858ac580aa7e86ecf32ee5 (patch)
tree71643c01f781877ae677f424dbfb6023f521e4d7 /src/soc/rockchip/rk3288/clock.h
parent1fd5a9b36d8b817614ef7f0c301291da0cdb7466 (diff)
rockchip: support i2c clock setting
BUG=None TEST=Boot Veyron Pinky and measure i2c clock frequency Original-Change-Id: I04d9fa75a05280885f083a828f78cf55811ca97d Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/219660 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Julius Werner <jwerner@chromium.org> Change-Id: Ie7ac3f2d0d76a4d3347bd469bf7af3295cc454fd (cherry picked from commit 4b9b3c2f8b7c6cd189cb8f239508431ee08ebc52) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9241 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/rockchip/rk3288/clock.h')
-rw-r--r--src/soc/rockchip/rk3288/clock.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3288/clock.h b/src/soc/rockchip/rk3288/clock.h
index 4613c72450..452d352194 100644
--- a/src/soc/rockchip/rk3288/clock.h
+++ b/src/soc/rockchip/rk3288/clock.h
@@ -32,5 +32,4 @@ void rkclk_ddr_reset(u32 ch, u32 ctl, u32 phy);
void rkclk_ddr_phy_ctl_reset(u32 ch, u32 n);
void rkclk_configure_ddr(unsigned int hz);
void rkclk_configure_i2s(unsigned int hz);
-
#endif /* __SOC_ROCKCHIP_RK3288_CLOCK_H__ */