diff options
| author | huang lin <hl@rock-chips.com> | 2014-09-27 12:02:27 +0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2015-04-02 21:16:28 +0200 |
| commit | bbcffd9e25e12a8ee5858ac580aa7e86ecf32ee5 (patch) | |
| tree | 71643c01f781877ae677f424dbfb6023f521e4d7 /src/soc/rockchip/rk3288/clock.c | |
| parent | 1fd5a9b36d8b817614ef7f0c301291da0cdb7466 (diff) | |
rockchip: support i2c clock setting
BUG=None
TEST=Boot Veyron Pinky and measure i2c clock frequency
Original-Change-Id: I04d9fa75a05280885f083a828f78cf55811ca97d
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/219660
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Change-Id: Ie7ac3f2d0d76a4d3347bd469bf7af3295cc454fd
(cherry picked from commit 4b9b3c2f8b7c6cd189cb8f239508431ee08ebc52)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9241
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/rockchip/rk3288/clock.c')
| -rw-r--r-- | src/soc/rockchip/rk3288/clock.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c index 6d6262884a..2449674f20 100644 --- a/src/soc/rockchip/rk3288/clock.c +++ b/src/soc/rockchip/rk3288/clock.c @@ -131,6 +131,7 @@ static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 4); * aclk_periph = * periph_clk_src / (peri_aclk_div_con + 1) */ +#define PERI_ACLK_DIV_SHIFT (0x0) #define PERI_ACLK_DIV_MSK (0x1F) /*******************CLKSEL37 BITS***************************/ |