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authorJiazi Yang <Tomato_Yang@asus.com>2014-12-24 04:11:14 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-15 16:44:33 +0200
commit64c775624c8d717757f0cac430f915c7496cf17a (patch)
tree882ae7d407b456286517907fbada3c0b46ae7285 /src/soc/rockchip/rk3288/clock.c
parent5eb4c0252f96c7f98f747b7ac2581558443f1b1d (diff)
veyron: add H9CCNNN8GTMLAR sdram in speedy
BRANCH=None TEST=emerge-veyron_speedy coreboot BUG=None Change-Id: Iab377e93472db0b7778df020afa84ee97f0e4079 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: fedf6ed7dc220d58ad10d49ac9ea02443746e77e Original-Change-Id: Id5024bfd32a0aa1fb00f3af8dc337ccccaf40729 Original-Signed-off-by: Jiazi Yang <Tomato_Yang@asus.com> Original-Reviewed-on: https://chromium-review.googlesource.com/237544 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Trybot-Ready: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9640 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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