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authorAaron Durbin <adurbin@chromium.org>2016-04-27 23:05:52 -0500
committerAaron Durbin <adurbin@chromium.org>2016-04-29 19:49:09 +0200
commit80a3df260767a6d9ad34b61572d483579c21476c (patch)
treec4bd3b49f9dbf21d437b28a99b99b23b4e963d1b /src/soc/rockchip/common
parent588ccaa9a7d94da4f5a5b3579eb9e3d06c9f4a51 (diff)
soc/intel/apollolake: clarify Fast SPI CS2 pad configuration
The pad for CS2 of the Fast SPI interface needs to be configured for automatic MMIO translation when a SPI TPM is utilized. Instead of unconditionally configuring that pad under LPC_TPM provide a explicit Kconfig for a mainboard to select. Change-Id: Ia94b90e12d71a4b849359188a853f7e036cc583b Signed-off-by: Aaron Durbin <adurbin@chormium.org> Reviewed-on: https://review.coreboot.org/14531 Reviewed-by: Andrey Petrov <andrey.petrov@intel.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/rockchip/common')
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