diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2020-08-10 20:37:16 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2020-08-11 19:10:08 +0000 |
commit | c0d4eeb387f9892ad33e117ab3fc3648918e823a (patch) | |
tree | 50ecdbd478abc8e93d7eca5c0b8a4ef553040e57 /src/soc/rockchip/common/uart.c | |
parent | 4bf419fbf750eb4c3f3f7f05486ea4bf503274ed (diff) |
soc/amd/common/espi_util: espi_std_io_decode: fix edge case bug
When address and data register for the SIO control register access is
passed as one I/O region with a size of 2, the corresponding special
decode enable register should be used instead of a generic one to save
the rather limited generic ones for other decode ranges.
Change-Id: Ie54ff6afa2bd2156f7b3a3cf83091f1f932b6993
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44351
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/rockchip/common/uart.c')
0 files changed, 0 insertions, 0 deletions