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authorJulius Werner <jwerner@chromium.org>2019-12-02 22:03:27 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-12-04 14:11:17 +0000
commit55009af42c39f413c49503670ce9bc2858974962 (patch)
tree099e9728bfe8066999de4d7a30021eb10bd71d12 /src/soc/rockchip/common/spi.c
parent1c371572188a90ea16275460dd4ab6bf9966350b (diff)
Change all clrsetbits_leXX() to clrsetbitsXX()
This patch changes all existing instances of clrsetbits_leXX() to the new endian-independent clrsetbitsXX(), after double-checking that they're all in SoC-specific code operating on CPU registers and not actually trying to make an endian conversion. This patch was created by running sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g' across the codebase and cleaning up formatting a bit. Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/rockchip/common/spi.c')
-rw-r--r--src/soc/rockchip/common/spi.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/rockchip/common/spi.c b/src/soc/rockchip/common/spi.c
index 0307e24d35..d91bae0eac 100644
--- a/src/soc/rockchip/common/spi.c
+++ b/src/soc/rockchip/common/spi.c
@@ -70,13 +70,13 @@ static struct rockchip_spi_slave *to_rockchip_spi(const struct spi_slave *slave)
static void spi_cs_activate(const struct spi_slave *slave)
{
struct rockchip_spi *regs = to_rockchip_spi(slave)->regs;
- setbits_le32(&regs->ser, 1);
+ setbits32(&regs->ser, 1);
}
static void spi_cs_deactivate(const struct spi_slave *slave)
{
struct rockchip_spi *regs = to_rockchip_spi(slave)->regs;
- clrbits_le32(&regs->ser, 1);
+ clrbits32(&regs->ser, 1);
}
static void rockchip_spi_enable_chip(struct rockchip_spi *regs, int enable)
@@ -141,8 +141,8 @@ void rockchip_spi_set_sample_delay(unsigned int bus, unsigned int delay_ns)
/* Rxd Sample Delay */
rsd = DIV_ROUND_CLOSEST(delay_ns * (SPI_SRCCLK_HZ >> 8), 1*GHz >> 8);
assert(rsd <= 3);
- clrsetbits_le32(&regs->ctrlr0, SPI_RXDSD_MASK << SPI_RXDSD_OFFSET,
- rsd << SPI_RXDSD_OFFSET);
+ clrsetbits32(&regs->ctrlr0, SPI_RXDSD_MASK << SPI_RXDSD_OFFSET,
+ rsd << SPI_RXDSD_OFFSET);
}
static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
@@ -172,7 +172,7 @@ static int rockchip_spi_wait_till_not_busy(struct rockchip_spi *regs)
static void set_tmod(struct rockchip_spi *regs, unsigned int tmod)
{
- clrsetbits_le32(&regs->ctrlr0, SPI_TMOD_MASK << SPI_TMOD_OFFSET,
+ clrsetbits32(&regs->ctrlr0, SPI_TMOD_MASK << SPI_TMOD_OFFSET,
tmod << SPI_TMOD_OFFSET);
}
@@ -275,9 +275,9 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
}
mask = SPI_APB_8BIT << SPI_HALF_WORLD_TX_OFFSET;
if (use_16bit)
- clrbits_le32(&regs->ctrlr0, mask);
+ clrbits32(&regs->ctrlr0, mask);
else
- setbits_le32(&regs->ctrlr0, mask);
+ setbits32(&regs->ctrlr0, mask);
/* Enable/disable transmitter and receiver as needed to
* avoid sending or reading spurious bits. */