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| author | Patrick Georgi <patrick@georgi-clan.de> | 2016-04-28 08:02:14 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-05-09 08:47:47 +0200 |
| commit | 50afb0631f768c338e588b237e5eccf05879211f (patch) | |
| tree | bb22ea6768128db4398bcde543bef23686490c4c /src/soc/rockchip/common/cbmem.c | |
| parent | 93649b122e354341e2556173f2a427c94cb6a8d6 (diff) | |
rockchip/spi: Allow SPI buses > 2
If SPI_BASEx is defined (for 2 < x <= 5), allow selecting it.
Since the bus number translates into an offset into an array, require
that all earlier buses are defined, too.
Also assert() that the array is properly sized instead of blindly
exceeding its bounds when called with a too big bus number.
TEST=initializing bus 5 doesn't trap anymore on kevin
BRANCH=none
BUG=none
Change-Id: I69f8ebe10854976608197a13d223ee8a555a9545
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c4af2a4ad4d6eea551653ca300ea6d04f1280919
Original-Change-Id: I27724d64d822ed0ec824a69ed611140bfbe08f5a
Original-Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Reviewed-on: https://chromium-review.googlesource.com/341034
Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/14723
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/common/cbmem.c')
0 files changed, 0 insertions, 0 deletions