diff options
| author | Ravi Kumar Bokka <rbokka@codeaurora.org> | 2021-11-10 05:24:17 +0530 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2022-03-16 23:08:05 +0000 |
| commit | 4573ca42e675fb8b61bcf05591d8d4d05f93944d (patch) | |
| tree | 265e2c1e8f43cd92d0965f27ec36eba3f7bffb2b /src/soc/qualcomm | |
| parent | 944291d458ae90cc4fd1f249339cbd7d3d34078f (diff) | |
soc/qualcomm/common: Add dram information to CBMEM table
BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org>
Change-Id: I0f1dd05ee224bf8284661c0afaa01d0a9d71daa7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/soc/qualcomm')
| -rw-r--r-- | src/soc/qualcomm/common/include/soc/qclib_common.h | 1 | ||||
| -rw-r--r-- | src/soc/qualcomm/common/qclib.c | 34 |
2 files changed, 35 insertions, 0 deletions
diff --git a/src/soc/qualcomm/common/include/soc/qclib_common.h b/src/soc/qualcomm/common/include/soc/qclib_common.h index c906ef2f73..648b29d343 100644 --- a/src/soc/qualcomm/common/include/soc/qclib_common.h +++ b/src/soc/qualcomm/common/include/soc/qclib_common.h @@ -22,6 +22,7 @@ #define QCLIB_TE_DDR_TRAINING_DATA "ddr_training_data" #define QCLIB_TE_LIMITS_CFG_DATA "limits_cfg_data" #define QCLIB_TE_QCSDI "qcsdi" +#define QCLIB_TE_MEM_CHIP_INFO "mem_chip_info" /* BA_BMASK_VALUES (blob_attributes bit mask values) */ #define QCLIB_BA_SAVE_TO_STORAGE 0x00000001 diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c index e016f25740..9a485db193 100644 --- a/src/soc/qualcomm/common/qclib.c +++ b/src/soc/qualcomm/common/qclib.c @@ -16,9 +16,35 @@ #include <soc/symbols_common.h> #include <security/vboot/misc.h> #include <vb2_api.h> +#include <commonlib/bsd/mem_chip_info.h> #define QCLIB_VERSION 0 +/* store QcLib return data until ROMSTAGE_CBMEM_INIT_HOOK runs */ +static void *mem_chip_addr; + +static void write_mem_chip_information(struct qclib_cb_if_table_entry *te) +{ + /* Save mem_chip_info in local variables ahead of hook running */ + mem_chip_addr = (void *)te->blob_address; +} + +static void add_mem_chip_info(int unused) +{ + void *mem_region_base = NULL; + + /* Add cbmem table */ + if (sizeof(struct mem_chip_info) != 0) + mem_region_base = cbmem_add(CBMEM_ID_MEM_CHIP_INFO, + sizeof(struct mem_chip_info)); + ASSERT(mem_region_base != NULL); + + /* Migrate the data into CBMEM */ + memcpy(mem_region_base, mem_chip_addr, sizeof(struct mem_chip_info)); +} + +ROMSTAGE_CBMEM_INIT_HOOK(add_mem_chip_info); + struct qclib_cb_if_table qclib_cb_if_table = { .magic = QCLIB_MAGIC_NUMBER, .version = QCLIB_INTERFACE_VERSION, @@ -87,6 +113,10 @@ static void write_table_entry(struct qclib_cb_if_table_entry *te) write_qclib_log_to_cbmemc(te); + } else if (!strncmp(QCLIB_TE_MEM_CHIP_INFO, te->name, + sizeof(te->name))) { + write_mem_chip_information(te); + } else { printk(BIOS_WARNING, "%s write not implemented\n", te->name); @@ -139,6 +169,10 @@ void qclib_load_and_run(void) qclib_add_if_table_entry(QCLIB_TE_DDR_TRAINING_DATA, _ddr_training, REGION_SIZE(ddr_training), 0); + /* Attempt to read MEM CHIP information */ + qclib_add_if_table_entry(QCLIB_TE_MEM_CHIP_INFO, + mem_chip_addr, sizeof(mem_chip_addr), 0); + /* Attempt to load PMICCFG Blob */ data_size = cbfs_load(CONFIG_CBFS_PREFIX "/pmiccfg", _pmic, REGION_SIZE(pmic)); |