diff options
| author | Jimmy Zhang <jimmzhang@nvidia.com> | 2014-03-05 11:12:25 -0800 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-13 06:26:40 +0100 |
| commit | df761ea005a8116f5000fde42bb04d78869906ac (patch) | |
| tree | 5bef3f6c8072bcadde9c96c040af83598c6a6f74 /src/soc/qualcomm | |
| parent | c225e4c3350f1ec477478ec376924a098c961ddb (diff) | |
t124: Skip PLLP init to 408MHz
PLLP is configured to 408MHz by hardware on T124. Init PLLP is needed only when
to configure it other than 408MHz.
BUG=none
TEST=build nyan and boot kernel.
Original-Change-Id: I8b1abf510ab886e7fddea8864a6d36f12529880e
Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/188849
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
(cherry picked from commit d32124cb7562cbce1bb929c3e5f238b13a27b752)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I617f77444a8dd97b20763b50066a1298d3b97724
Reviewed-on: http://review.coreboot.org/7415
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/soc/qualcomm')
0 files changed, 0 insertions, 0 deletions