diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-09-09 10:52:35 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-02 13:29:39 +0200 |
| commit | 70e189e9e8ec9c47dc76dcd92e12c5d3124975b4 (patch) | |
| tree | 38a902fda3e5d1080f02ea6fa6f5147518081281 /src/soc/qualcomm | |
| parent | 51bdc4781635b99d89e6b7a414a2172be8cb690c (diff) | |
ipq806x: provide soc specific CBMEM_CONSOLE_PRERAM_BASE
For now storm bootblock runs with DRAM fully initialized, this patch
puts the early console between bootblock and rom phase.
BUG=chrome-os-partner:31734
TEST=verified that preram_cbmem_console is set:
$ grep preram_cbmem_console cbfs/fallback/bootblock.map
40618000 A preram_cbmem_console
Change-Id: I2d63f5fde0d3794062068289c648d8bcda11a9a3
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 6bdadad3787d6a4a2d4828b0f300455fedca2b8d
Original-Change-Id: I132a0cbcc82e713c36fc5031706d9afbf3e9b879
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/217291
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9198
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index fc78ecc5b0..013d86c380 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -55,6 +55,10 @@ config SYS_SDRAM_BASE hex default 0x40000000 +config CBMEM_CONSOLE_PRERAM_BASE + hex "memory address of the pre-RAM CBMEM console buffer" + default 0x40618000 + config STACK_TOP hex default 0x40600000 |