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authorKane Chen <kane.chen@intel.corp-partner.google.com>2023-05-08 14:25:10 +0800
committerNick Vaccaro <nvaccaro@google.com>2023-07-18 19:07:32 +0000
commitcaa8a20d87646ab46b49d985b55175227129fdc8 (patch)
treeec0baa8e7b2565bf3e06eeb885fbcbadfcb8cb13 /src/soc/qualcomm
parentea025af4dcf7f7642cda61a05089b140c39670b6 (diff)
soc/intel/alderlake: Hook up CsPiStartHighinEct UPD
This commit provides option for board to set CsPiStartHighinEct FSP UPD using a new cs_pi_start_high_in_ect mb_cfg field. BUG=b:279835630 BRANCH=none TEST=CsPiStartHighinEct UPD is set properly Change-Id: I7d0d5f3c782e29fb047ea421e1a5fdfc30bcc26d Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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