diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-18 15:08:13 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-23 16:30:58 +0000 |
| commit | 977673894ff486af2ff74ba5585ca6039701eb8f (patch) | |
| tree | b9719dc91560c7f5fcb791da0c767979e9bb48e0 /src/soc/qualcomm/sc7280/pcie.c | |
| parent | 334772008c547d971e2591ef53bd570c176572ed (diff) | |
src/soc/qualcomm: Remove unnecessary space after casts
Change-Id: Ic6c711fe3fad19c24ca4c01f8d0a4bc002f14bd6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69807
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/sc7280/pcie.c')
| -rw-r--r-- | src/soc/qualcomm/sc7280/pcie.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/soc/qualcomm/sc7280/pcie.c b/src/soc/qualcomm/sc7280/pcie.c index 28d520c486..edc73b0313 100644 --- a/src/soc/qualcomm/sc7280/pcie.c +++ b/src/soc/qualcomm/sc7280/pcie.c @@ -140,13 +140,13 @@ static const struct qcom_qmp_phy_init_tbl sc7280_qmp_gen3x2_pcie_misc_tbl[] = { }; static pcie_cntlr_cfg_t pcie_host = { - .parf = (void *) PCIE1_PCIE_PARF, - .dbi_base = (void *) PCIE1_GEN3X2_PCIE_DBI, - .elbi = (void *) PCIE1_GEN3X2_PCIE_ELBI, - .atu_base = (void *) PCIE1_GEN3X2_DWC_PCIE_DM_IATU, - .cfg_base = (void *) PCIE1_GEN3X2_PCIE_DBI + PCIE_EP_CONF_OFFSET, - .pcie_bcr = (void *) PCIE1_BCR, - .qmp_phy_bcr = (void *) GCC_PCIE_1_PHY_BCR, + .parf = (void *)PCIE1_PCIE_PARF, + .dbi_base = (void *)PCIE1_GEN3X2_PCIE_DBI, + .elbi = (void *)PCIE1_GEN3X2_PCIE_ELBI, + .atu_base = (void *)PCIE1_GEN3X2_DWC_PCIE_DM_IATU, + .cfg_base = (void *)PCIE1_GEN3X2_PCIE_DBI + PCIE_EP_CONF_OFFSET, + .pcie_bcr = (void *)PCIE1_BCR, + .qmp_phy_bcr = (void *)GCC_PCIE_1_PHY_BCR, .lanes = PCIE_3x2_NUM_LANES, .cfg_size = PCIE_EP_CONF_SIZE, .perst = GPIO(2), @@ -160,14 +160,14 @@ static pcie_cntlr_cfg_t pcie_host = { }; static pcie_qmp_phy_cfg_t pcie1_qmp_phy_3x2 = { - .qmp_phy_base = (void *) PCIE_1_QMP_PHY, - .serdes = (void *) PCE1_QPHY_SERDES, - .tx0 = (void *) PCE1_QPHY_TX0, - .rx0 = (void *) PCE1_QPHY_RX0, - .pcs = (void *) PCIE1_QMP_PHY_PCS_COM, - .tx1 = (void *) PCE1_QPHY_TX1, - .rx1 = (void *) PCE1_QPHY_RX1, - .pcs_misc = (void *) PCE1_QPHY_PCS_MISC, + .qmp_phy_base = (void *)PCIE_1_QMP_PHY, + .serdes = (void *)PCE1_QPHY_SERDES, + .tx0 = (void *)PCE1_QPHY_TX0, + .rx0 = (void *)PCE1_QPHY_RX0, + .pcs = (void *)PCIE1_QMP_PHY_PCS_COM, + .tx1 = (void *)PCE1_QPHY_TX1, + .rx1 = (void *)PCE1_QPHY_RX1, + .pcs_misc = (void *)PCE1_QPHY_PCS_MISC, .serdes_tbl = sc7280_qmp_pcie_serdes_tbl, .serdes_tbl_num = ARRAY_SIZE(sc7280_qmp_pcie_serdes_tbl), .tx_tbl = sc7280_qmp_pcie_tx_tbl, |