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| author | Jonathon Hall <jonathon.hall@puri.sm> | 2024-01-18 13:49:58 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-20 01:28:29 +0000 |
| commit | 5fe0f9057ee503576e6c1ade17408cbe38a91202 (patch) | |
| tree | b28b4fa03eedd92d7767d9ce5b12dea37689348c /src/soc/qualcomm/sc7280/memlayout.ld | |
| parent | 4e818c5309d1efc79dad2771eaae0c37e6a07315 (diff) | |
mb/purism/librem_skl: Fix pcie_rp5 in device tree (WLAN)
WLAN has always been pcie_rp5, there is nothing on pcie_rp1. RP5 gets
promoted to function 0 (RP1's function) since no earlier functions are
enabled.
This simplifies later refactoring that will handle the FSP root port
enable flags (which were correctly set already) using the device tree
enables.
Test: Boot librem_13v2 and verify WLAN is enabled.
Change-Id: I7a724a01b5f171a16de83ff6122630e2d66557c1
Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/soc/qualcomm/sc7280/memlayout.ld')
0 files changed, 0 insertions, 0 deletions