diff options
| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-11-06 12:00:10 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-09 07:40:26 +0000 |
| commit | 8af39ff63364e71b142e5ca4ce3d560ac651af08 (patch) | |
| tree | d7f7edafaf64bf929e642ac8408929aa43f9e7b6 /src/soc/qualcomm/sc7180 | |
| parent | 5145e23a3510b6c6129b5e8aa56876fcfcb1adb6 (diff) | |
mb/google/dedede/variants/magolor: Update Power Limit2 minimum value
Update Power Limit2 (PL2) minimum value to the same as maximum value
for magolor board. DTT does not throttle PL2, so this minimum value
change here does not impact any existing behavior on the system.
BUG=b:168353037
BRANCH=None
TEST=Build and test on magolor board
Change-Id: I74e960de506d366cba2c8aefb23f9e69337fd163
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47285
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180')
0 files changed, 0 insertions, 0 deletions