diff options
author | Shelley Chen <shchen@google.com> | 2022-05-11 18:29:19 -0700 |
---|---|---|
committer | Shelley Chen <shchen@google.com> | 2022-05-31 22:19:02 +0000 |
commit | 363202b43589ec240c4a0c8f5b449fbd5c1333f8 (patch) | |
tree | 100b1fce60d7bc89ef6d0240c4fc45144ae12af5 /src/soc/qualcomm/sc7180 | |
parent | 84d54d40b8b54ec036c2e597c404aaeb98746e63 (diff) |
soc/qualcomm: Increase SPI frequency to 75 MHz
Increase frequency of sc7280 to 75 MHz. Setting the delay to 1/8 of
a cycle as a result of experimentation.
BUG=b:190231148
BRANCH=None
TEST=Make sure that herobrine board boots
HW Engineer measured SPI frequency and verified running at 75 MHz
Signed-off-by: Shelley Chen <shchen@google.com>
Change-Id: I3cf5a7c85f12800a11ece397a354349f2a0a235f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64673
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180')
-rw-r--r-- | src/soc/qualcomm/sc7180/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/qualcomm/sc7180/bootblock.c b/src/soc/qualcomm/sc7180/bootblock.c index 365b7d4460..c108157573 100644 --- a/src/soc/qualcomm/sc7180/bootblock.c +++ b/src/soc/qualcomm/sc7180/bootblock.c @@ -8,6 +8,6 @@ void bootblock_soc_init(void) { clock_init(); - quadspi_init(37500 * KHz); + quadspi_init(37500 * KHz, 0); qupv3_fw_init(); } |