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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-24 19:05:47 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-26 11:43:04 +0000 |
commit | 2ed6848ea3530beb234a3b9d5c843a54688d1d3c (patch) | |
tree | f1ad8aa91516ecd18bbcee3568f864f5b9f3780f /src/soc/qualcomm/sc7180/timer.c | |
parent | 8d82109c08163fa82263b35e9aa0a270a795a5f8 (diff) |
soc/amd/exit_car.S: Drop redundant enabling cache
This is already done in arch/x86/exit_car.S
Change-Id: Ie954aa11d5e76aaa3e2185ba552aafe8d075feb6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37179
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/qualcomm/sc7180/timer.c')
0 files changed, 0 insertions, 0 deletions