summaryrefslogtreecommitdiff
path: root/src/soc/qualcomm/sc7180/soc.c
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2022-10-13 16:12:40 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-14 15:36:21 +0000
commit26651c85a03bbe09e17d0e17757c882dae404ebd (patch)
treefcfb04194a668f6399f583eee1a58f40858c1986 /src/soc/qualcomm/sc7180/soc.c
parenta11b472fd30aaf076c60627c6fd3cc795bda67c8 (diff)
soc/amd/stoneyridge: use devicetree ops over pci driver
Stoneyridge is a SoC so it makes sense to statically use ops instead of matching them to PCI DID/VID at runtime. In contrast to the other AMD SoCs in the coreboot tree the PC driver used the PCI ID of the first HT PCI device function, so add the ops to the device 0x18 function 0 devicetree entry in this patch. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I500521701479aa271ebd61e22a1494c8bfaf87fb Reviewed-on: https://review.coreboot.org/c/coreboot/+/68408 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/soc.c')
0 files changed, 0 insertions, 0 deletions