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authorT Michael Turney <mturney@codeaurora.org>2019-10-09 07:04:54 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-10-21 09:06:55 +0000
commit7783c606a4694c39d2da26d10cf6b3ad036dfa81 (patch)
tree0f5469fbccdfdae48721177e9f39d961768df331 /src/soc/qualcomm/sc7180/soc.c
parent511a8f5538e7e095258f187b7aae9c32eeb4962a (diff)
sc7180: Provide initial SoC support
Change-Id: Iddcef560c1987486436b73ca1d5fc83cee2f713c Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/soc.c')
-rw-r--r--src/soc/qualcomm/sc7180/soc.c48
1 files changed, 48 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sc7180/soc.c b/src/soc/qualcomm/sc7180/soc.c
new file mode 100644
index 0000000000..7003b39a75
--- /dev/null
+++ b/src/soc/qualcomm/sc7180/soc.c
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018-2019, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <symbols.h>
+#include <device/device.h>
+#include <soc/mmu.h>
+#include <soc/mmu_common.h>
+#include <soc/symbols.h>
+
+static void soc_read_resources(struct device *dev)
+{
+ ram_resource(dev, 0, (uintptr_t)ddr_region->offset / KiB,
+ ddr_region->size / KiB);
+ reserved_ram_resource(dev, 1, (uintptr_t)_dram_soc / KiB,
+ REGION_SIZE(dram_soc) / KiB);
+}
+
+static void soc_init(struct device *dev)
+{
+
+}
+
+static struct device_operations soc_ops = {
+ .read_resources = soc_read_resources,
+ .init = soc_init,
+};
+
+static void enable_soc_dev(struct device *dev)
+{
+ dev->ops = &soc_ops;
+}
+
+struct chip_operations soc_qualcomm_sc7180_ops = {
+ CHIP_NAME("SOC Qualcomm SC7180")
+ .enable_dev = enable_soc_dev,
+};