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authorT Michael Turney <mturney@codeaurora.org>2020-11-05 13:49:59 -0800
committerJulius Werner <jwerner@chromium.org>2020-11-06 22:34:25 +0000
commit7bfef7d50ce6e7c6e562189249a180e4e9861749 (patch)
treedab22f11b779ee75734d28d3789d967979b4e495 /src/soc/qualcomm/sc7180/mmu.c
parentac2da047acb50ce8a776e8d2218c2b304af8be02 (diff)
sc7180: Correct mmu configuration for AOP SRAM regions
NOC errors detected at runtime in AOP SRAM region strongly suggested speculative memory accesses were occurring in memory regions that either don't exist or are device memory rather than SRAM. Signed-off-by: T Michael Turney <mturney@codeaurora.org> Change-Id: I6611dc614c80063c7df057b59337417c8f56fd9c Reviewed-on: https://review.coreboot.org/c/coreboot/+/47261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/mmu.c')
-rw-r--r--src/soc/qualcomm/sc7180/mmu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/qualcomm/sc7180/mmu.c b/src/soc/qualcomm/sc7180/mmu.c
index b33baca0f1..8447c01b72 100644
--- a/src/soc/qualcomm/sc7180/mmu.c
+++ b/src/soc/qualcomm/sc7180/mmu.c
@@ -22,5 +22,6 @@ void sc7180_mmu_init(void)
void soc_mmu_dram_config_post_dram_init(void)
{
- mmu_config_range((void *)_aop, REGION_SIZE(aop), CACHED_RAM);
+ mmu_config_range((void *)_aop_code_ram, REGION_SIZE(aop_code_ram), CACHED_RAM);
+ mmu_config_range((void *)_aop_data_ram, REGION_SIZE(aop_data_ram), CACHED_RAM);
}