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authorWisley Chen <wisley.chen@quantatw.com>2019-12-19 18:08:09 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-12-26 10:45:26 +0000
commita8a7374e843bae6c98ad242d2870bef6043d165d (patch)
treec130f01788a4d07c7cb8aec588383b2570ec37a2 /src/soc/qualcomm/sc7180/include
parente15087691064157532410050c87f6a27f9b85353 (diff)
hatch: Fix FPMCU pwr/rst gpio handling for dratini/jinlon
In https://review.coreboot.org/c/coreboot/+/37459 (commit fcd8c9e99e7f70e2b9494f2fa28a08ba13126daa) which moves power/reset pin control of FPMCU to var/board/ramstage, but does not implement it for dratini/jinlon. So, add it in dratini/jinlon. BUG=b:146366921 TEST=emerge-hatch coreboot Change-Id: I1b6dbe4ba0a1242aa64346410beed4152b4f457f Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37833 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/include')
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