diff options
author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2021-05-21 11:58:55 +0800 |
---|---|---|
committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-05-25 22:33:09 +0000 |
commit | 3d2297e13dbe891785a143ea4858965ff55b4512 (patch) | |
tree | c72ca01792e126c5de339a5f059c91da0b7a2b37 /src/soc/qualcomm/sc7180/gpio.c | |
parent | a28419afcc49db68be7a7001e6b4f10ea95e04d0 (diff) |
mb/google/dedede/var/cret: Generate new SPD ID for new memory
Add new memory MT53E512M32D1NP-046 WT:B in the mem_parts_used.txt and
generate the SPD ID for the parts.
BUG=b:183057749
BRANCH=dedede
TEST=Build the cret board.
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Ib797af858e8f7ea275291e552102db74f4724aad
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54747
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/gpio.c')
0 files changed, 0 insertions, 0 deletions