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authorT Michael Turney <mturney@codeaurora.org>2019-10-22 06:25:09 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-12-05 17:57:16 +0000
commit050be72e77fb5beaf0882c9abaf1ce9a571231dc (patch)
treee3aeab406a0f574692d361d17d375d6514ed7f98 /src/soc/qualcomm/sc7180/Makefile.inc
parent6bbf8f238f27f35a77ba653a627d88a51e17660c (diff)
sc7180: Add USB support
This includes USB QUSB2,QMP Phy and Controller support And libpayload support for USB Change-Id: I0651fc28dc227efbeb23eeefe9b96a3b940ae995 Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35503 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180/Makefile.inc')
-rw-r--r--src/soc/qualcomm/sc7180/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sc7180/Makefile.inc b/src/soc/qualcomm/sc7180/Makefile.inc
index 8a76a03c9c..5f4dc1d756 100644
--- a/src/soc/qualcomm/sc7180/Makefile.inc
+++ b/src/soc/qualcomm/sc7180/Makefile.inc
@@ -26,6 +26,7 @@ romstage-y += ../common/qclib.c
romstage-y += qclib.c
romstage-y += ../common/mmu.c
romstage-y += mmu.c
+romstage-y += usb.c
romstage-y += spi.c
romstage-y += gpio.c
romstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
@@ -41,6 +42,7 @@ ramstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
ramstage-y += clock.c
ramstage-$(CONFIG_SC7180_QSPI) += qspi.c
ramstage-y += aop_load_reset.c
+ramstage-y += usb.c
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