sc7180: Add UART support

This implements the UART driver in SoC

Developer/Reviewer, be aware of this patch from Napali:
https://review.coreboot.org/c/coreboot/+/25373/78

Change-Id: I6494daa108197c030577ac86dab71f9ca6c21bdb
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35500
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 7 insertions, 3 deletions

diff --git a/src/soc/qualcomm/sc7180/Makefile.inc b/src/soc/qualcomm/sc7180/Makefile.inc
index 554efd8801..e49521b4bb 100644
--- a/src/soc/qualcomm/sc7180/Makefile.inc
+++ b/src/soc/qualcomm/sc7180/Makefile.inc
@@ -17,9 +17,11 @@ bootblock-y += qcom_qup_se.c
 verstage-y += timer.c
 verstage-y += spi.c
 verstage-y += gpio.c
-verstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
 verstage-y += clock.c
 verstage-$(CONFIG_SC7180_QSPI) += qspi.c
+verstage-y += qcom_qup_se.c
+verstage-y += qupv3_config.c
+verstage-$(CONFIG_DRIVERS_UART) += qupv3_uart.c
 
 ################################################################################
 romstage-y += cbmem.c
@@ -31,22 +33,24 @@ romstage-y += mmu.c
 romstage-y += usb.c
 romstage-y += spi.c
 romstage-y += gpio.c
-romstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
 romstage-y += clock.c
 romstage-$(CONFIG_SC7180_QSPI) += qspi.c
+romstage-y += qcom_qup_se.c
+romstage-y += qupv3_config.c
+romstage-$(CONFIG_DRIVERS_UART) += qupv3_uart.c
 
 ################################################################################
 ramstage-y += soc.c
 ramstage-y += timer.c
 ramstage-y += spi.c
 ramstage-y += gpio.c
-ramstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
 ramstage-y += clock.c
 ramstage-$(CONFIG_SC7180_QSPI) += qspi.c
 ramstage-y += aop_load_reset.c
 ramstage-y += usb.c
 ramstage-y += qupv3_config.c
 ramstage-y += qcom_qup_se.c
+ramstage-$(CONFIG_DRIVERS_UART) += qupv3_uart.c
 
 ################################################################################