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| author | Ashish Kumar Mishra <ashish.k.mishra@intel.com> | 2024-02-02 20:18:56 +0530 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2024-02-08 06:02:54 +0000 |
| commit | 32ebaef73c8e1cc367e1c63af587250041fce32a (patch) | |
| tree | cb21b257f38e60eadf225773379ed1384fb1a52b /src/soc/qualcomm/qcs405/include | |
| parent | 33659d246e5d89885413d4ea30525dacdacc56ee (diff) | |
mb/google/brox: Handle GPI_INT pin lower to GPI_WAKE
In case where PAD_CFG_GPI_INT() is initialized with a pin value
lower to PAD_CFG_GPI_IRQ_WAKE() for same GPIO community
the set_ioapic_used() is only called for the PAD_CFG_GPI_IRQ_WAKE() pin.
Due to this the IRQ associated with PAD_CFG_GPI_INT() is found free by
find_free_unique_irq() during IRQ assignment and assigned to other pins
which causes IRQ conflicts
BUG=b:322984217
BRANCH=None
TEST=Boot test on brox, check if correct IRQ assigned to EC
Change-Id: I8c3d557e888b8d0ceac203f49b702910fba26d6d
Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80334
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/qcs405/include')
0 files changed, 0 insertions, 0 deletions