qcs405: Add GPIO API

Introduce new and required GPIO APIs, using common pinmux
definitions for GPIO configuration.

TEST=build & run

Change-Id: I85ce9007c545b44371c4704a0456774d0eff12a8
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 4 insertions, 0 deletions

diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc
index 2d1f842f95..c702264739 100644
--- a/src/soc/qualcomm/qcs405/Makefile.inc
+++ b/src/soc/qualcomm/qcs405/Makefile.inc
@@ -6,21 +6,25 @@ bootblock-y += bootblock.c
 bootblock-y += timer.c
 bootblock-y += spi.c
 bootblock-y += mmu.c
+bootblock-y += gpio.c
 
 ################################################################################
 verstage-y += timer.c
 verstage-y += spi.c
+verstage-y += gpio.c
 
 ################################################################################
 romstage-y += timer.c
 romstage-y += spi.c
 romstage-y += cbmem.c
+romstage-y += gpio.c
 
 ################################################################################
 ramstage-y += soc.c
 ramstage-y += timer.c
 ramstage-y += spi.c
 ramstage-y += cbmem.c
+ramstage-y += gpio.c
 
 ################################################################################