diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-07-25 17:34:42 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-23 17:20:07 +0100 |
| commit | d36ef6a51df0d9bb840f091adee8b7bf3424b331 (patch) | |
| tree | 9fb86d06b177b6580283944c92a0baf027f234e8 /src/soc/qualcomm/ipq806x/include/iomap.h | |
| parent | 9c9c3364643d9b8e138f503c391163475c9dfffc (diff) | |
ipq806x: implement GPIO API
Add implementation of the GPIO API defined in src/include/gpiolib.h.
Also, clean up the GPIO driver, make it use pointers instead of
integers for register address.
This requires a touch in the SPI driver, where the CS GPIO is toggled
and in the board function where it enables USB interface.
BUG=chrome-os-partner:30489
TEST=tested with the following patches, observed proto0 properly read
the board ID.
Original-Change-Id: I0962947c6bb32a854ca300752d259a48e9e7b4eb
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210115
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit e951f735001509d135cc61530ed0eecb5fc31a85)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I8a612dce000931835054086c1b02ebfc43dc57d2
Reviewed-on: http://review.coreboot.org/8718
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/qualcomm/ipq806x/include/iomap.h')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/include/iomap.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h index 69744bcd51..c9c8fc413a 100644 --- a/src/soc/qualcomm/ipq806x/include/iomap.h +++ b/src/soc/qualcomm/ipq806x/include/iomap.h @@ -81,9 +81,9 @@ #define DGT_CLEAR DGT_REG(0x000C) #define DGT_CLK_CTL DGT_REG(0x0010) -#define TLMM_BASE_ADDR 0x00800000 +#define TLMM_BASE_ADDR ((char *)0x00800000) #define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10) -#define GPIO_IN_OUT_ADDR(x) (TLMM_BASE_ADDR + 0x1004 + (x)*0x10) +#define GPIO_IN_OUT_ADDR(x) (GPIO_CONFIG_ADDR(x) + 4) /* Yes, this is not a typo... host2 is actually mapped before host1. */ #define USB_HOST2_XHCI_BASE 0x10000000 |