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authorSubrata Banik <subrata.banik@intel.com>2020-09-07 16:20:53 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-08 12:56:58 +0000
commit9209817acedd6db0369249ce094761df252f786d (patch)
treec67729cef37a4fafaa0aece593edb016b9b028e8 /src/soc/qualcomm/ipq806x/i2c.c
parent627371722c7293c3f246439dea0704258cf7e67e (diff)
pci_ids: Add Alder Lake DTT PCI IDs
Add PCI IDs for Intel's Dynamic Tuning Technology (DTT) for ADL. Also add NULL terminator at end of pci_device_ids. Change-Id: If25b1f562567a833683b0b8796bd1d6cac0bd490 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45140 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/ipq806x/i2c.c')
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