diff options
| author | Sourabh Banerjee <sbanerje@codeaurora.org> | 2015-02-19 16:43:26 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-17 09:59:53 +0200 |
| commit | 89208653320c099e3c4489a43f792633d99cf4c1 (patch) | |
| tree | bf172662053d8fe4c0d57f3a2d9ab36e57f81614 /src/soc/qualcomm/ipq806x/i2c.c | |
| parent | 3cfb6a066b6801186b716a4f789b69655e1e420e (diff) | |
ipq806x: extend GSBI driver to support i2c on any GSBI block
The GSBI driver is extended to be able to program the CTRL reg for any given
GSBI block. The NS and MD registers programming is made more readable by
programming the M, N, D and other bits of the registers individually.
Defined configure structs for each QUP block to be able to track the init
status for each qup.
Configured GPIO8 and GPIO9 for I2C fuction.
BRANCH=chromeos-2013.04
BUG=chrome-os-partner:36722
TEST=Booted up storm P0.2, verified that the TPM on GSBI1 still works.
Change-Id: I17906beedef5c80267cf114892080b121902210a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 07bc79211770decc1070c3a88874a4e452b8f5bc
Original-Change-Id: I841d0d419f7339f5e5cb3385da98786eb18252ad
Original-Signed-off-by: Sourabh Banerjee <sbanerje@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/250763
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Trybot-Ready: Vadim Bendebury <vbendeb@chromium.org>
Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/9759
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/ipq806x/i2c.c')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/i2c.c | 47 |
1 files changed, 40 insertions, 7 deletions
diff --git a/src/soc/qualcomm/ipq806x/i2c.c b/src/soc/qualcomm/ipq806x/i2c.c index a4d1c00856..9aaa173513 100644 --- a/src/soc/qualcomm/ipq806x/i2c.c +++ b/src/soc/qualcomm/ipq806x/i2c.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2014 The Linux Foundation. All rights reserved. + * Copyright (C) 2014 - 2015 The Linux Foundation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -37,11 +37,28 @@ #include <soc/gsbi.h> #include <soc/qup.h> -static const qup_config_t gsbi4_qup_config = { +static qup_config_t gsbi1_qup_config = { QUP_MINICORE_I2C_MASTER, 100000, 24000000, - QUP_MODE_FIFO + QUP_MODE_FIFO, + 0 +}; + +static qup_config_t gsbi4_qup_config = { + QUP_MINICORE_I2C_MASTER, + 100000, + 24000000, + QUP_MODE_FIFO, + 0 +}; + +static qup_config_t gsbi7_qup_config = { + QUP_MINICORE_I2C_MASTER, + 100000, + 24000000, + QUP_MODE_FIFO, + 0 }; static int i2c_read(uint32_t gsbi_id, uint8_t slave, @@ -84,10 +101,26 @@ static int i2c_write(uint32_t gsbi_id, uint8_t slave, static int i2c_init(unsigned bus) { - static uint8_t initialized = 0; unsigned gsbi_id = bus; + qup_config_t *qup_config; + + switch (gsbi_id) { + case GSBI_ID_1: + qup_config = &gsbi1_qup_config; + break; + case GSBI_ID_4: + qup_config = &gsbi4_qup_config; + break; + case GSBI_ID_7: + qup_config = &gsbi7_qup_config; + break; + default: + printk(BIOS_ERR, "QUP configuration not defind for GSBI%d.\n", + gsbi_id); + return 1; + } - if (initialized) + if (qup_config->initialized) return 0; if (gsbi_init(gsbi_id, GSBI_PROTO_I2C_ONLY)) { @@ -95,7 +128,7 @@ static int i2c_init(unsigned bus) return 1; } - if (qup_init(gsbi_id, &gsbi4_qup_config)) { + if (qup_init(gsbi_id, qup_config)) { printk(BIOS_ERR, "failed to initialize qup\n"); return 1; } @@ -105,7 +138,7 @@ static int i2c_init(unsigned bus) return 1; } - initialized = 1; + qup_config->initialized = 1; return 0; } |