diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-12-16 14:34:28 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-15 21:57:19 +0200 |
| commit | 6114c99d129710fece8d6ee473e861022b58b438 (patch) | |
| tree | 51598e081f2de59b7ffabc660ec3a2387a2c4bfd /src/soc/qualcomm/ipq806x/blobs_init.c | |
| parent | 18e434d1d35f96d5cf6a4b6c14f5528019c4f2f4 (diff) | |
ipq806x: load and start RPM
This patch finds the RPM image in the CBFS, loads it as defined by the
MBN header and signals to the RPM processor where the image is
located and waits for confirmation of the RPM starting.
The interactions with the RPM processor are copied as is from the
vendor provided sample code.
Debug messages added to help identify problems with loading the blobs,
should they ever happen.
BRANCH=storm
BUG=chrome-os-partner:34161
TEST=ramstage reports both TZBSP and RPM starting.
Change-Id: I81e86684f9d1b614f2059ee82c6561f9484605de
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: bbf2eda04a6e72b4f7b780f493b5a1cea0abfeb7
Original-Change-Id: Ic10af0744574c0eca9b5ab7567808c1b8d7fe0c2
Original-Signed-off-by: Vikas Das <vdas@codeaurora.org>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/236661
Original-Reviewed-by: Varadarajan Narayanan <varada@qti.qualcomm.com>
Reviewed-on: http://review.coreboot.org/9692
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/ipq806x/blobs_init.c')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/blobs_init.c | 45 |
1 files changed, 42 insertions, 3 deletions
diff --git a/src/soc/qualcomm/ipq806x/blobs_init.c b/src/soc/qualcomm/ipq806x/blobs_init.c index 0f3a99a7cc..a3c0cfa28e 100644 --- a/src/soc/qualcomm/ipq806x/blobs_init.c +++ b/src/soc/qualcomm/ipq806x/blobs_init.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright 2014 Google Inc. + * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,14 +18,16 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <arch/cache.h> +#include <arch/io.h> #include <cbfs.h> +#include <console/console.h> #include <string.h> -#include <arch/cache.h> +#include <timer.h> +#include <soc/iomap.h> #include <soc/soc_services.h> -#include <console/console.h> - #include "mbn_header.h" static void *load_ipq_blob(const char *file_name) @@ -93,7 +96,43 @@ void start_tzbsp(void) if (!tzbsp) die("could not find or map TZBSP\n"); + printk(BIOS_INFO, "Starting TZBSP\n"); + tz_init_wrapper(0, 0, tzbsp); } +void start_rpm(void) +{ + u32 load_addr; + u32 ready_mask = 1 << 10; + struct stopwatch sw; + + if (readl(RPM_SIGNAL_COOKIE) == RPM_FW_MAGIC_NUM) { + printk(BIOS_INFO, "RPM appears to have already started\n"); + return; + } + + load_addr = (u32) load_ipq_blob("rpm.mbn"); + if (!load_addr) + die("could not find or map RPM code\n"); + + printk(BIOS_INFO, "Starting RPM\n"); + + /* Clear 'ready' indication. */ + writel(readl(RPM_INT_ACK) & ~ready_mask, RPM_INT_ACK); + + /* Set RPM entry address */ + writel(load_addr, RPM_SIGNAL_ENTRY); + /* Set cookie */ + writel(RPM_FW_MAGIC_NUM, RPM_SIGNAL_COOKIE); + + /* Wait for RPM start indication, up to 100ms. */ + stopwatch_init_usecs_expire(&sw, 100000); + while (!(readl(RPM_INT) & ready_mask)) + if (stopwatch_expired(&sw)) + die("RPM Initialization failed\n"); + + /* Acknowledge RPM initialization */ + writel(ready_mask, RPM_INT_ACK); +} #endif /* !__PRE_RAM__ */ |