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authorDeepa Dinamani <deepad@codeaurora.org>2014-10-27 15:40:05 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-15 21:55:41 +0200
commit36417aa7422941f10d6f74b4711b02adcdba088b (patch)
treef5884b5d186b50488fb5cc1520a6b40fd1a13280 /src/soc/qualcomm/ipq806x/Makefile.inc
parent55e2f393a7fbc86b00404d5a7651525f9077a342 (diff)
ipq806x: modify imem layout
With introduction of uber-sbl SRAM usage pattern is changing, this introduces the new memory layout. This patch overlays DDR initialization code with uber-sbl, as uber-sbl goes out of scope as soon as bootblock starts. A 4K block at offset 0x3f000 added in the comments, this is a shared structure used by different QCA modules. This suggested layout is not final, but will allow to move closer to the production image. BRANCH=storm BUG=chrome-os-partner:34161 TEST=with other patches applied Storm boots all the way to rombase and initializes DRAM. Change-Id: I46af81b39b09935aa7fffdabda223e7e64c7a446 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a20c0570361038c0ae406dcb1f4bc657eea120f6 Original-Change-Id: I927f6ffc524fc8f0effd7b91d3f5d1e8d6be1530 Original-Signed-off-by: Deepa Dinamani <deepad@codeaurora.org> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/229023 Reviewed-on: http://review.coreboot.org/9683 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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