diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-09 14:00:44 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-18 16:00:45 +0000 |
| commit | 799c3219146c8d246ef95f1fdb83dc7bc1f2be61 (patch) | |
| tree | e6dcc99fe3b577d28b602311232779eff8dda4cb /src/soc/qualcomm/ipq40xx | |
| parent | 9cbbba68b650933cf552f9e1b969f08e463c641f (diff) | |
cbmem_top_chipset: Change the return value to uintptr_t
Get rid of a lot of casts.
Change-Id: I93645ef5dd270905ce421e68e342aff4c331eae6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Diffstat (limited to 'src/soc/qualcomm/ipq40xx')
| -rw-r--r-- | src/soc/qualcomm/ipq40xx/cbmem.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/qualcomm/ipq40xx/cbmem.c b/src/soc/qualcomm/ipq40xx/cbmem.c index 0ee9f9a587..c5d1a8144e 100644 --- a/src/soc/qualcomm/ipq40xx/cbmem.c +++ b/src/soc/qualcomm/ipq40xx/cbmem.c @@ -10,7 +10,7 @@ void ipq_cbmem_backing_store_ready(void) cbmem_backing_store_ready = 1; } -void *cbmem_top_chipset(void) +uintptr_t cbmem_top_chipset(void) { /* * In romstage, make sure that cbmem backing store is ready before @@ -19,7 +19,7 @@ void *cbmem_top_chipset(void) * for loading ipq blobs before DRAM is initialized). */ if (cbmem_backing_store_ready == 0) - return NULL; + return 0; - return _memlayout_cbmem_top; + return (uintptr_t)_memlayout_cbmem_top; } |