soc/qualcomm: Drop unneeded empty lines

Change-Id: If76502ff91896959ef171c192b4fc138dff18fc6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44599
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>

7 files changed, 0 insertions, 13 deletions

diff --git a/src/soc/qualcomm/ipq40xx/gpio.c b/src/soc/qualcomm/ipq40xx/gpio.c
index 2e2a8af8d8..e7874a786a 100644
--- a/src/soc/qualcomm/ipq40xx/gpio.c
+++ b/src/soc/qualcomm/ipq40xx/gpio.c
@@ -17,7 +17,6 @@ static inline int gpio_not_valid(gpio_t gpio)
 	return (gpio > GPIO_MAX_NUM);
 }
 
-
 /*******************************************************
 Function description: configure GPIO functinality
 Arguments :
@@ -30,7 +29,6 @@ unsigned enable - 0 Disable, 1 - Enable.
 Return : None
 *******************************************************/
 
-
 void gpio_tlmm_config_set(gpio_t gpio, unsigned int func,
 			  unsigned int pull, unsigned int drvstr,
 			  unsigned int enable)
@@ -60,7 +58,6 @@ unsigned *enable - 0 - Disable, 1- Enable.
 Return : None
 *******************************************************/
 
-
 void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func,
 			  unsigned int *pull, unsigned int *drvstr,
 			  unsigned int *enable)
@@ -93,7 +90,6 @@ int gpio_get(gpio_t gpio)
 	if (gpio_not_valid(gpio))
 		return -1;
 
-
 	return (read32(GPIO_IN_OUT_ADDR(gpio)) >> GPIO_IO_IN_SHIFT) &
 		GPIO_IO_IN_MASK;
 }
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/blsp.h b/src/soc/qualcomm/ipq40xx/include/soc/blsp.h
index 7671539c1a..cbef2084a9 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/blsp.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/blsp.h
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause */
 
-
 #ifndef __BLSP_H_
 #define __BLSP_H_
 
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
index 5c13581026..f3241fb5b9 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause */
 
-
 #ifndef _IPQ40XX_CDP_H_
 #define _IPQ40XX_CDP_H_
 
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/clock.h b/src/soc/qualcomm/ipq40xx/include/soc/clock.h
index 6859b1f1a7..1c4c32977d 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/clock.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/clock.h
@@ -175,7 +175,6 @@
 #define GMAC_COREn_CLCK_INV_DISABLE		(0 << 5)
 #define GMAC_COREn_CLCK_BRANCH_ENA		(1 << 4)
 
-
 /* Uart specific clock settings */
 
 void uart_pll_vote_clk_enable(unsigned int);
@@ -186,5 +185,4 @@ void usb_clock_config(void);
 int audio_clock_config(unsigned int frequency);
 int blsp_i2c_clock_config(blsp_qup_id_t id);
 
-
 #endif  /*  __PLATFORM_IPQ40XX_CLOCK_H_ */
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/ipq_uart.h b/src/soc/qualcomm/ipq40xx/include/soc/ipq_uart.h
index c730d2c190..feac71c7b9 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/ipq_uart.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/ipq_uart.h
@@ -10,7 +10,6 @@
 
 extern void __udelay(unsigned long usec);
 
-
 enum MSM_BOOT_UART_DM_PARITY_MODE {
 	MSM_BOOT_UART_DM_NO_PARITY,
 	MSM_BOOT_UART_DM_ODD_PARITY,
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/spi.h b/src/soc/qualcomm/ipq40xx/include/soc/spi.h
index 9fcc15fae2..0ccc5caabb 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/spi.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/spi.h
@@ -134,7 +134,6 @@ struct blsp_spi {
 	void *qup_deassert_wait;
 };
 
-
 #define SUCCESS		0
 
 #define DUMMY_DATA_VAL		0
@@ -148,7 +147,6 @@ struct blsp_spi {
  * (count function disabled) and does not hold significance in the count. */
 #define MAX_PACKET_COUNT	((64 * KiB) - 1)
 
-
 struct ipq_spi_slave {
 	struct spi_slave slave;
 	const struct blsp_spi *regs;
diff --git a/src/soc/qualcomm/ipq40xx/usb.c b/src/soc/qualcomm/ipq40xx/usb.c
index 7707c50fba..b3c0813fbb 100644
--- a/src/soc/qualcomm/ipq40xx/usb.c
+++ b/src/soc/qualcomm/ipq40xx/usb.c
@@ -44,14 +44,12 @@
 #define DWC3_GSNPSID			0xc120
 #define DWC3_DCTL			0xc704
 
-
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
 #define DWC3_GSNPSID_MASK		0xffff0000
 #define DWC3_GEVTEN			0xc114
 
-
 #define DWC3_GCTL_SCALEDOWN(n)		((n) << 4)
 #define DWC3_GCTL_SCALEDOWN_MASK	DWC3_GCTL_SCALEDOWN(3)
 #define DWC3_GCTL_DISSCRAMBLE		(1 << 3)