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authorWeiyi Lu <weiyi.lu@mediatek.com>2021-02-03 16:20:57 +0800
committerHung-Te Lin <hungte@chromium.org>2021-04-28 02:42:03 +0000
commit450fd0b536fd1bd956ee575716cfc6b8b8b46bab (patch)
treee1774cf4dbbef1fd34764cc31fafcb5d10e44d11 /src/soc/qualcomm/ipq40xx/usb.c
parent2368a310be4bf60ea9c83fc89e89be9d6a040775 (diff)
soc/mediatek/mt8195: Add PLL and clock init support
Add PLL and clock init code. Add frequency meter and API for raising little CPU/CCI frequency. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Change-Id: I8ded0236d10826687f080bd5a213feb55d4bae03 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52667 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/ipq40xx/usb.c')
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