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authorVaradarajan Narayanan <varada@codeaurora.org>2016-03-02 16:57:10 +0530
committerPatrick Georgi <pgeorgi@google.com>2016-05-10 21:34:21 +0200
commita6935c2508c426f30d6bf5bcf4c3130277a0f998 (patch)
treee844bb803e8c069101fdf6ec47017af9dc832713 /src/soc/qualcomm/ipq40xx/soc.c
parentc84e2fe893e02de3c5d97d26d05462351ac90d91 (diff)
soc/qualcomm/ipq40xx: Initial commit for IPQ40xx SoC support
Copy 'ipq806x' files as a template BUG=chrome-os-partner:49249 TEST=None. Initial code not sure if it will even compile BRANCH=none Original-Commit-Id: dc6a5937953fe61cd4b5a99ca49f9371c4b712d4 Original-Change-Id: If171fcdd3b0561cb6b7dab5f8434de7ef711ea41 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Signed-off-by: Kan Yan <kyan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/333178 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> squashed: soc/qualcomm/ipq40xx: Update ipq806x/storm references Since the files were taken from ipq806x/storm as template. Update those references to reflect ipq40xx/gale. BUG=chrome-os-partner:49249 TEST=None. Initial code not sure if it will even compile BRANCH=none Original-Commit-Id: c6c76d184cc92c09e6826fbdc7d7fac59b2cb69b Original-Change-Id: Ieae1bce25291243b4a6034d37a6949978f318997 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/333293 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Change-Id: Ie5794c48131ae562861074b406106734541880d9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14644 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/qualcomm/ipq40xx/soc.c')
-rw-r--r--src/soc/qualcomm/ipq40xx/soc.c57
1 files changed, 57 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq40xx/soc.c b/src/soc/qualcomm/ipq40xx/soc.c
new file mode 100644
index 0000000000..201e9bc9fe
--- /dev/null
+++ b/src/soc/qualcomm/ipq40xx/soc.c
@@ -0,0 +1,57 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <symbols.h>
+#include <soc/ipq_uart.h>
+
+#define RESERVED_SIZE_KB (0x01500000 / KiB)
+
+static void soc_read_resources(device_t dev)
+{
+ /* Reserve bottom 0x150_0000 bytes for NSS, SMEM, etc. */
+ reserved_ram_resource(dev, 0, (uintptr_t)_dram / KiB, RESERVED_SIZE_KB);
+ ram_resource(dev, 0, (uintptr_t)_dram / KiB + RESERVED_SIZE_KB,
+ (CONFIG_DRAM_SIZE_MB * KiB) - RESERVED_SIZE_KB);
+}
+
+static void soc_init(device_t dev)
+{
+ /*
+ * Do this in case console is not enabled: kernel's earlyprintk()
+ * should work no matter what the firmware console configuration is.
+ */
+ ipq40xx_uart_init();
+
+ printk(BIOS_INFO, "CPU: QCA 40xx\n");
+}
+
+static struct device_operations soc_ops = {
+ .read_resources = soc_read_resources,
+ .init = soc_init,
+};
+
+static void enable_soc_dev(device_t dev)
+{
+ dev->ops = &soc_ops;
+}
+
+struct chip_operations soc_qualcomm_ipq40xx_ops = {
+ CHIP_NAME("SOC QCA 40xx")
+ .enable_dev = enable_soc_dev,
+};