soc/qualcomm/ipq40xx: Add support for BLSP QUP I2C

Able to talk to the TPM device and the commands
seem to succeed.

BUG=chrome-os-partner:49249 chrome-os-partner:49250
TEST=All commands to the TPM succeed
BRANCH=none

Original-Commit-Id: c13900108f524c8422c38dee88469c8bfe24d0bd
Original-Change-Id: Ie8c3c1ab1290cd8d7e6ddd1ae22f765c7be81019
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333314
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>

squashed:

soc/qualcomm/ipq40xx: Add support for BLSP QUP SPI

- Enable BLSP SPI driver for ipq40xx
- supports only FIFO mode

BUG=chrome-os-partner:49249
TEST=None. Initial code not sure if it will even compile
BRANCH=none

Original-Commit-Id: 0714025975854dd048d35fe602824ead4c7d94e9
Original-Change-Id: If809b0fdf7d6c9405db6fd3747a3774c00ea9870
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333303
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>

Change-Id: Ia518af5bfc782b08a0883ac93224d476d07e2426
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/14677
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 0 insertions, 109 deletions

diff --git a/src/soc/qualcomm/ipq40xx/gsbi.c b/src/soc/qualcomm/ipq40xx/gsbi.c
deleted file mode 100644
index 98c4edd084..0000000000
--- a/src/soc/qualcomm/ipq40xx/gsbi.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 - 2015 The Linux Foundation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above
- *       copyright notice, this list of conditions and the following
- *       disclaimer in the documentation and/or other materials provided
- *       with the distribution.
- *     * Neither the name of The Linux Foundation nor the names of its
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <arch/io.h>
-#include <soc/iomap.h>
-#include <soc/gsbi.h>
-#include <console/console.h>
-
-static inline void *gsbi_ctl_reg_addr(gsbi_id_t gsbi_id)
-{
-	switch (gsbi_id) {
-	case GSBI_ID_1:
-		return GSBI1_CTL_REG;
-	case GSBI_ID_2:
-		return GSBI2_CTL_REG;
-	case GSBI_ID_3:
-		return GSBI3_CTL_REG;
-	case GSBI_ID_4:
-		return GSBI4_CTL_REG;
-	case GSBI_ID_5:
-		return GSBI5_CTL_REG;
-	case GSBI_ID_6:
-		return GSBI6_CTL_REG;
-	case GSBI_ID_7:
-		return GSBI7_CTL_REG;
-	default:
-		printk(BIOS_ERR, "Unsupported GSBI%d\n", gsbi_id);
-		return 0;
-	}
-}
-
-gsbi_return_t gsbi_init(gsbi_id_t gsbi_id, gsbi_protocol_t protocol)
-{
-	unsigned reg_val;
-	unsigned m = 1;
-	unsigned n = 4;
-	unsigned pre_div = 4;
-	unsigned src = 3;
-	unsigned mnctr_mode = 2;
-	void *gsbi_ctl = gsbi_ctl_reg_addr(gsbi_id);
-
-	if (!gsbi_ctl)
-		return GSBI_ID_ERROR;
-
-	write32(GSBI_HCLK_CTL(gsbi_id),
-		(1 << GSBI_HCLK_CTL_GATE_ENA) |
-		(1 << GSBI_HCLK_CTL_BRANCH_ENA));
-
-	if (gsbi_init_board(gsbi_id))
-		return GSBI_UNSUPPORTED;
-
-	write32(GSBI_QUP_APSS_NS_REG(gsbi_id), 0);
-	write32(GSBI_QUP_APSS_MD_REG(gsbi_id), 0);
-
-	reg_val = ((m & GSBI_QUP_APPS_M_MASK) << GSBI_QUP_APPS_M_SHFT) |
-		  ((~n & GSBI_QUP_APPS_D_MASK) << GSBI_QUP_APPS_D_SHFT);
-	write32(GSBI_QUP_APSS_MD_REG(gsbi_id), reg_val);
-
-	reg_val = (((~(n - m)) & GSBI_QUP_APPS_N_MASK) <<
-					GSBI_QUP_APPS_N_SHFT) |
-		  ((mnctr_mode & GSBI_QUP_APPS_MNCTR_MODE_MSK) <<
-				 GSBI_QUP_APPS_MNCTR_MODE_SFT) |
-		  (((pre_div - 1) & GSBI_QUP_APPS_PRE_DIV_MSK) <<
-				 GSBI_QUP_APPS_PRE_DIV_SFT) |
-		  (src & GSBI_QUP_APPS_SRC_SEL_MSK);
-	write32(GSBI_QUP_APSS_NS_REG(gsbi_id), reg_val);
-
-	reg_val |= (1 << GSBI_QUP_APPS_ROOT_ENA_SFT) |
-		   (1 << GSBI_QUP_APPS_MNCTR_EN_SFT);
-	write32(GSBI_QUP_APSS_NS_REG(gsbi_id), reg_val);
-
-	reg_val |= (1 << GSBI_QUP_APPS_BRANCH_ENA_SFT);
-	write32(GSBI_QUP_APSS_NS_REG(gsbi_id), reg_val);
-
-	/*Select i2c protocol*/
-	write32(gsbi_ctl,
-		((GSBI_CTL_PROTO_I2C & GSBI_CTL_PROTO_CODE_MSK)
-			<< GSBI_CTL_PROTO_CODE_SFT));
-
-	return GSBI_SUCCESS;
-}