soc/qualcomm/common/qspi: Add support for common QSPI driver

copy existing QSPI driver from /soc/qualcomm/sc7180 to common folder.

This common QSPI driver works in master mode and provides read/write
operation for the slave devices like flash.

BUG=b:182963902
TEST=Validated on qualcomm sc7180 and sc7280 development board

Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Change-Id: I5b3816b823e14db1dd13f1eb4a6761c7a61604b9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>

1 files changed, 23 insertions, 0 deletions

diff --git a/src/soc/qualcomm/common/spi.c b/src/soc/qualcomm/common/spi.c
new file mode 100644
index 0000000000..b4db3e589c
--- /dev/null
+++ b/src/soc/qualcomm/common/spi.c
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <spi-generic.h>
+#include <spi_flash.h>
+#include <soc/qspi_common.h>
+
+static const struct spi_ctrlr qspi_ctrlr = {
+	.claim_bus = qspi_claim_bus,
+	.release_bus = qspi_release_bus,
+	.xfer = qspi_xfer,
+	.xfer_dual = qspi_xfer_dual,
+	.max_xfer_size = QSPI_MAX_PACKET_COUNT,
+};
+
+const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
+	{
+		.ctrlr = &qspi_ctrlr,
+		.bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+		.bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
+	},
+};
+
+const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);