qualcomm: Add QCLib interface support to common/

Change-Id: I38d086c379a3c2f54d1603a2fed5b33860f7f4d7
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32288
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

1 files changed, 26 insertions, 0 deletions

diff --git a/src/soc/qualcomm/common/mmu.c b/src/soc/qualcomm/common/mmu.c
new file mode 100644
index 0000000000..79d2eb7271
--- /dev/null
+++ b/src/soc/qualcomm/common/mmu.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/mmu.h>
+#include <soc/mmu.h>
+#include <soc/mmu_common.h>
+
+__weak void soc_mmu_dram_config_post_dram_init(void) { /* no-op */ }
+
+void qc_mmu_dram_config_post_dram_init(void *ddr_base, size_t ddr_size)
+{
+	mmu_config_range((void *)ddr_base, ddr_size, CACHED_RAM);
+	soc_mmu_dram_config_post_dram_init();
+}