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authorChien-Chih Tseng <chien-chih.tseng@mediatek.com>2020-12-14 14:59:39 +0800
committerHung-Te Lin <hungte@chromium.org>2021-05-11 08:51:09 +0000
commita39ea90506ea200f3dbf2c14bea82c327a37edbc (patch)
tree324c502e5a39a6a4984354442f874747f8cdf695 /src/soc/nvidia
parent0250a7888d91f816310fd5bd36c86d05167a7403 (diff)
soc/mediatek/mt8192: add apusys init flow
Setup APU mbox's functional configuration registers. BUG=b:186369803 BRANCH=asurada TEST=boot asurada correctly Signed-off-by: Chien-Chih Tseng <chien-chih.tseng@mediatek.com> Change-Id: If05a8af1a2f96598adcf70e15003e4f5dc94e337 Signed-off-by: Flora Fu <flora.fu@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48622 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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