tegra/nyan*: sdram updates

nyan_big: Add 204MHz BCT for bringup, use 1.2V for VDD_CPU
Reviewed-on: https://chromium-review.googlesource.com/183939
(cherry picked from commit a6df76afb5342b805baca749abb8265e15748dc1)

nyan_big: Add initial 792MHz BCT
Reviewed-on: https://chromium-review.googlesource.com/183975
(cherry picked from commit 61d0122fdce6dc9479666bb0a5bc079c6389f78a)

nyan_big: use RAM_CODE[3:2] for ram code
Reviewed-on: https://chromium-review.googlesource.com/184076
(cherry picked from commit 35e5c5e473f871cdc897473a31586afbececd716)

tegra124: support tri-state Board Id
Reviewed-on: https://chromium-review.googlesource.com/183855
(cherry picked from commit 1a9d1bd73aa2cd0c36203b247976ad0d00a360e4)

nyan*: Fix SPI pinmux configuration
Reviewed-on: https://chromium-review.googlesource.com/184281
(cherry picked from commit ac4106b673c285af66d72392bd4a8522aba98489)

nyan_big: Add 4GB 204/792MHz BCTs
Reviewed-on: https://chromium-review.googlesource.com/184159
(cherry picked from commit 5ff002d09f8db0543b58962f6c0d24627fb0937e)

tegra124: Add function for obtaining DRAM size via MC regs
Reviewed-on: https://chromium-review.googlesource.com/184535
(cherry picked from commit d4580c46de649903a266a99eb11c9126ba385b48)

tegra124/nyan*: Obtain DRAM size dynamically
Reviewed-on: https://chromium-review.googlesource.com/184431
(cherry picked from commit a7db71744771decc04cf1966efba70bf4897cfa3)

tegra124: Rearrange iRAM layout to allow more space for romstage
Reviewed-on: https://chromium-review.googlesource.com/184240
(cherry picked from commit 6bdaabbc068146a4516c724b71d31bb777dabcfc)

tegra124: Fix MemoryType field name in SDRAM parameters.
Reviewed-on: https://chromium-review.googlesource.com/185113
(cherry picked from commit 9caccd1e86a8c683402fab87d9f3a49b87496e97)

nyan_big: Initialize SDRAM without BootROM.
Reviewed-on: https://chromium-review.googlesource.com/183624
(cherry picked from commit a1cbc00aa80ec1ea52e833a8e31c8e4b27160e70)

tegra124: move FB_SIZE_MB to a more appropriate location
Reviewed-on: https://chromium-review.googlesource.com/184930
(cherry picked from commit ddea486fd4410394417c4e59039d46a324918bdc)

nyan: Initialize SDRAM without BootROM.
Reviewed-on: https://chromium-review.googlesource.com/185114
(cherry picked from commit 1ff51b580b28553919f91b11b443251b048cf26b)

tegra124: Save SDRAM parameters to PMC registers for LP0
Reviewed-on: https://chromium-review.googlesource.com/182928
(cherry picked from commit 7476b4bd0ecdc312476cce871d22f57915a0bd86)

tegra124: Rewrite SDRAM parameter saving code to be more efficient
Reviewed-on: https://chromium-review.googlesource.com/184388
(cherry picked from commit 25084bd0407624e4b2ff82388c32af1198c501a6)

nyan: Slightly change the way SDRAM parameter files are set up
Reviewed-on: https://chromium-review.googlesource.com/185286
(cherry picked from commit a31887b804f23e031c395113db582cd71f3d1b6d)

Squashed 16 commits for SDRAM support on nyan and nyan_big.

Change-Id: I07419985376277083d62400dd14fe8273f6d5ca8
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6949
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

3 files changed, 57 insertions, 0 deletions

diff --git a/src/soc/nvidia/tegra/dc.h b/src/soc/nvidia/tegra/dc.h
index 7a38adf0a0..48ffbda356 100644
--- a/src/soc/nvidia/tegra/dc.h
+++ b/src/soc/nvidia/tegra/dc.h
@@ -569,4 +569,7 @@ struct disp_ctl_win {
 
 void display_startup(device_t dev);
 void dp_bringup(u32 winb_addr);
+
+unsigned int fb_base_mb(void);
+
 #endif /* __SOC_NVIDIA_TEGRA_DC_H */
diff --git a/src/soc/nvidia/tegra/gpio.c b/src/soc/nvidia/tegra/gpio.c
index 4cf6d5f43a..ac0fc3f986 100644
--- a/src/soc/nvidia/tegra/gpio.c
+++ b/src/soc/nvidia/tegra/gpio.c
@@ -22,6 +22,7 @@
 #include <soc/addressmap.h>
 #include <stddef.h>
 #include <stdint.h>
+#include <delay.h>
 
 #include "gpio.h"
 #include "pinmux.h"
@@ -174,6 +175,58 @@ int gpio_get_in_value(gpio_t gpio)
 	return (port & (1 << bit)) != 0;
 }
 
+int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int value[])
+{
+	/*
+	 * GPIOs which are tied to stronger external pull up or pull down
+	 * will stay there regardless of the internal pull up or pull
+	 * down setting.
+	 *
+	 * GPIOs which are floating will go to whatever level they're
+	 * internally pulled to.
+	 */
+
+	int temp;
+	int index;
+
+	/* Enable internal pull up */
+	for (index = 0; index < num_gpio; ++index)
+		gpio_input_pullup(gpio[index]);
+
+	/* Wait until signals become stable */
+	udelay(10);
+
+	/* Get gpio values at internal pull up */
+	for (index = 0; index < num_gpio; ++index)
+		value[index] = gpio_get_in_value(gpio[index]);
+
+	/* Enable internal pull down */
+	for (index = 0; index < num_gpio; ++index)
+		gpio_input_pulldown(gpio[index]);
+
+	/* Wait until signals become stable */
+	udelay(10);
+
+	/*
+	 * Get gpio values at internal pull down.
+	 * Compare with gpio pull up value and then
+	 * determine a gpio final value/state:
+	 *  0: pull down
+	 *  1: pull up
+	 *  2: floating
+	 */
+	for (index = 0; index < num_gpio; ++index) {
+		temp = gpio_get_in_value(gpio[index]);
+		value[index] = ((value[index] ^ temp) << 1) | temp;
+	}
+
+	/* Disable pull up / pull down to conserve power */
+	for (index = 0; index < num_gpio; ++index)
+		gpio_input(gpio[index]);
+
+	return 0;
+}
+
 int gpio_get_int_status(gpio_t gpio)
 {
 	int bit = gpio % GPIO_GPIOS_PER_PORT;
diff --git a/src/soc/nvidia/tegra/gpio.h b/src/soc/nvidia/tegra/gpio.h
index 70c1026f44..5f6833af79 100644
--- a/src/soc/nvidia/tegra/gpio.h
+++ b/src/soc/nvidia/tegra/gpio.h
@@ -81,6 +81,7 @@ void gpio_set_out_value(gpio_t gpio, int value);
 int gpio_get_out_value(gpio_t gpio);
 
 int gpio_get_in_value(gpio_t gpio);
+int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int value[]);
 
 int gpio_get_int_status(gpio_t gpio);