diff options
| author | Furquan Shaikh <furquan@google.com> | 2015-10-15 12:15:31 -0700 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2015-11-07 03:29:14 +0100 |
| commit | b3f6ad35221984419ee0998f47b778d669d1636e (patch) | |
| tree | 306fc113435cb78c63d2950db33af8f577754d51 /src/soc/nvidia/tegra210 | |
| parent | 1148786c05d97b4c646c11e770b275809b562953 (diff) | |
arm64: Remove SMP support
As ARM Trusted Firmware is the only first class citizen for
booting arm64 multi-processor in coreboot remove SMP
support. If SoCs want to bring up MP then ATF needs to be
ported and integrated.
Change-Id: Ife24d53eed9b7a5a5d8c69a64d7a20a55a4163db
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/11909
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/nvidia/tegra210')
| -rw-r--r-- | src/soc/nvidia/tegra210/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra210/cpu_lib.S | 23 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra210/soc.c | 26 |
3 files changed, 3 insertions, 47 deletions
diff --git a/src/soc/nvidia/tegra210/Makefile.inc b/src/soc/nvidia/tegra210/Makefile.inc index 2898cec780..84d59d7721 100644 --- a/src/soc/nvidia/tegra210/Makefile.inc +++ b/src/soc/nvidia/tegra210/Makefile.inc @@ -64,7 +64,6 @@ romstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += addressmap.c ramstage-y += cbmem.c ramstage-y += cpu.c -ramstage-y += cpu_lib.S ramstage-y += clock.c ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += dc.c ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += dsi.c diff --git a/src/soc/nvidia/tegra210/cpu_lib.S b/src/soc/nvidia/tegra210/cpu_lib.S deleted file mode 100644 index 90406433ff..0000000000 --- a/src/soc/nvidia/tegra210/cpu_lib.S +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - -.text -.global smp_processor_id -smp_processor_id: - /* Core 0 and 1 are encoded in the Aff0 (7:0) field of MPIDR_EL1. */ - mrs x0, mpidr_el1 - uxtb w0, w0 - ret diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c index 871c148946..bcbef49d10 100644 --- a/src/soc/nvidia/tegra210/soc.c +++ b/src/soc/nvidia/tegra210/soc.c @@ -58,30 +58,11 @@ static void soc_read_resources(device_t dev) ram_resource(dev, index++, begin * KiB, size * KiB); } -static size_t cntrl_total_cpus(void) -{ - return CONFIG_MAX_CPUS; -} - -static int cntrl_start_cpu(unsigned int id, void (*entry)(void)) -{ - if (id >= CONFIG_MAX_CPUS) - return -1; - start_cpu(id, entry); - return 0; -} - -static struct cpu_control_ops cntrl_ops = { - .total_cpus = cntrl_total_cpus, - .start_cpu = cntrl_start_cpu, -}; - - static void soc_init(device_t dev) { clock_init_arm_generic_timer(); - arch_initialize_cpus(dev, &cntrl_ops); + arch_initialize_cpu(dev); if (!IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) return; @@ -132,9 +113,8 @@ struct chip_operations soc_nvidia_tegra210_ops = { static void tegra210_cpu_init(device_t cpu) { - if (cpu_is_bsp()) - if (tegra210_run_mtc() != 0) - printk(BIOS_ERR, "MTC: No training data.\n"); + if (tegra210_run_mtc() != 0) + printk(BIOS_ERR, "MTC: No training data.\n"); } static const struct cpu_device_id ids[] = { |