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author | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-06-16 13:27:03 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-17 14:38:33 +0000 |
commit | eead23e6a3c0869710e61a40d77b695d03abac89 (patch) | |
tree | b87dc50e484cdaded3afcc1e744a4fcd0aaecd90 /src/soc/nvidia/tegra210/memlayout.ld | |
parent | 031c40a7853ab156d54e5f554cfe1031ffde7662 (diff) |
soc/intel/skylake: Define macro TOTAL_PADS
Define total GPIO pins as TOTAL_PADS.
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I40294339c79f5db1850ccd546292c67169890b2c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65161
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210/memlayout.ld')
0 files changed, 0 insertions, 0 deletions