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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-29 18:31:16 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 19:27:53 +0200
commit038e7247dc9705ff2d47dd90ec9a807f6feb52ba (patch)
tree8cca6a6db31d20a8e045ee5892e8f9cb8de43f8d /src/soc/nvidia/tegra210/lp0
parentf9e7d1b0ca7282a0d51313a68f90e9298c0c46c6 (diff)
src/soc: Capitalize CPU, ACPI, RAM and ROM
Change-Id: I7f0d3400126d593bad8e78f95e6b9a378463b4ce Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15963 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra210/lp0')
-rw-r--r--src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
index 15477d6fe2..d3ac67b00f 100644
--- a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
@@ -1024,7 +1024,7 @@ void lp0_resume(void)
* 1 : MAX77621
*/
if (read32(pmc_scratch201_ptr) & PMIC_77621)
- /* Set cpu rail 0.85V */
+ /* Set CPU rail 0.85V */
i2c_send(MAX77621_I2C_ADDR, MAX77621_VOUT_DATA);
else
/* Enable GPIO5 on MAX77620 PMIC */