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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-12-14 12:39:36 -0700
committerMartin Roth <martinroth@google.com>2017-12-20 16:35:53 +0000
commit854d4dd9e2bd803a81ae0c90c26143a10f25abc4 (patch)
treec600ed01ce385657ad96ea68cc06a4919c83b7f9 /src/soc/nvidia/tegra210/dma.c
parentf183a85932246dee7c6a1a78d7c944c46c123450 (diff)
amd/stoneyridge: Force PSP command reg settings in bootblock
A subsequent patch to the PSP library will rely on the device already having its PCI command register set to allow memory decoding and mastering enabled. Program the command register ahead of loading the SMU FW1 blob in bootblock. When the device has not been set up (e.g. when SMU FW is not selectable), AGESA sets up the device. As a result, a similar change is not required before sending the DRAM ready command. Change-Id: Id586106751286c4767b5c16ed7e1604523635492 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/22876 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210/dma.c')
0 files changed, 0 insertions, 0 deletions