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authorFurquan Shaikh <furquan@google.com>2014-08-26 15:43:16 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-28 07:05:10 +0100
commitae879bbecb81812fe65388d1b17447b6a9a982f0 (patch)
tree76a76c22959057bb5ad4e2182c179708ec0094cd /src/soc/nvidia/tegra132
parentabde3b56cebc611391a3e3ec63172acefea4daae (diff)
tegra132: Add secmon support
BUG=chrome-os-partner:30785 BRANCH=None TEST=Compiles successfully and secmon loads and jumps to payload successfully. Change-Id: I929cf2c938fb5d8c20e13fbd1fdbd349378914ff Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 2e5d6adc63c4d820417985e34f1f04810b38422b Original-Change-Id: I442546178ad945e7639a99dd2943d13a69b06d09 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/214372 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9081 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132')
-rw-r--r--src/soc/nvidia/tegra132/Kconfig1
-rw-r--r--src/soc/nvidia/tegra132/Makefile.inc4
-rw-r--r--src/soc/nvidia/tegra132/secmon.c50
3 files changed, 55 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index 022c77cb2f..24bf8649a0 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -15,6 +15,7 @@ config SOC_NVIDIA_TEGRA132
select ARM_BOOTBLOCK_CUSTOM
select DYNAMIC_CBMEM
select SMP
+ select ARCH_USE_SECURE_MONITOR
if SOC_NVIDIA_TEGRA132
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index 261e570f73..9c6809d7e3 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -73,6 +73,10 @@ ramstage-y += spintable.S
ramstage-y += mmu_operations.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
ramstage-y += ../tegra/usb.c
+ramstage-$(CONFIG_ARCH_USE_SECURE_MONITOR) += secmon.c
+
+secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += cpu_lib.S
+secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += uart.c
modules_arm-y += monotonic_timer.c
VBOOT_STUB_DEPS += $(obj)/soc/nvidia/tegra132/monotonic_timer.rmodules_arm.o
diff --git a/src/soc/nvidia/tegra132/secmon.c b/src/soc/nvidia/tegra132/secmon.c
new file mode 100644
index 0000000000..0a5ec7f113
--- /dev/null
+++ b/src/soc/nvidia/tegra132/secmon.c
@@ -0,0 +1,50 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/secmon.h>
+#include <console/console.h>
+#include "mmu_operations.h"
+#include <soc/addressmap.h>
+
+static void soc_get_secure_mem(uint64_t *base, size_t *size)
+{
+ uintptr_t tz_base_mib;
+ size_t tz_size_mib;
+
+ carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
+
+ tz_base_mib *= MiB;
+ tz_size_mib *= MiB;
+
+ *base = tz_base_mib;
+ *size = tz_size_mib;
+}
+
+void soc_get_secmon_base_size(uint64_t *base, size_t *size)
+{
+ uintptr_t tz_base;
+ size_t ttb_size, tz_size;
+
+ soc_get_secure_mem(&tz_base, &tz_size);
+
+ ttb_size = TTB_SIZE * MiB;
+
+ *base = tz_base + ttb_size;
+ *size = tz_size - ttb_size;
+}