diff options
author | Julius Werner <jwerner@chromium.org> | 2014-11-10 13:14:24 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-14 09:01:27 +0200 |
commit | efcee767deed9d10628764eb9143724dd206d5fa (patch) | |
tree | 1c08a60bd292e8217856bdc367535fe4e187c8b4 /src/soc/nvidia/tegra132 | |
parent | f780c40f40306a21489f8ddd6e17c979ba0fd7a3 (diff) |
CBFS: Automate ROM image layout and remove hardcoded offsets
Non-x86 boards currently need to hardcode the position of their CBFS
master header in a Kconfig. This is very brittle because it is usually
put in between the bootblock and the first CBFS entry, without any
checks to guarantee that it won't overlap either of those. It is not fun
to debug random failures that move and disappear with tiny alignment
changes because someone decided to write "ORBC1112" over some part of
your data section (in a way that is not visible in the symbolized .elf
binaries, only in the final image). This patch seeks to prevent those
issues and reduce the need for manual configuration by making the image
layout a completely automated part of cbfstool.
Since automated placement of the CBFS header means we can no longer
hardcode its position into coreboot, this patch takes the existing x86
solution of placing a pointer to the header at the very end of the
CBFS-managed section of the ROM and generalizes it to all architectures.
This is now even possible with the read-only/read-write split in
ChromeOS, since coreboot knows how large that section is from the
CBFS_SIZE Kconfig (which is by default equal to ROM_SIZE, but can be
changed on systems that place other data next to coreboot/CBFS in ROM).
Also adds a feature to cbfstool that makes the -B (bootblock file name)
argument on image creation optional, since we have recently found valid
use cases for CBFS images that are not the first boot medium of the
device (instead opened by an earlier bootloader that can already
interpret CBFS) and therefore don't really need a bootblock.
BRANCH=None
BUG=None
TEST=Built and booted on Veyron_Pinky, Nyan_Blaze and Falco.
Change-Id: Ib715bb8db258e602991b34f994750a2d3e2d5adf
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e9879c0fbd57f105254c54bacb3e592acdcad35c
Original-Change-Id: Ifcc755326832755cfbccd6f0a12104cba28a20af
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229975
Reviewed-on: http://review.coreboot.org/9620
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132')
-rw-r--r-- | src/soc/nvidia/tegra132/Kconfig | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig index 0870c7e68c..4c927a8cb8 100644 --- a/src/soc/nvidia/tegra132/Kconfig +++ b/src/soc/nvidia/tegra132/Kconfig @@ -42,22 +42,10 @@ config BOOTBLOCK_CPU_INIT bootblock must load microcode or copy data from ROM before searching for the bootblock. -config BOOTBLOCK_ROM_OFFSET - hex - default 0x0 - config MAX_CPUS int default 2 -config CBFS_HEADER_ROM_OFFSET - hex "offset of master CBFS header in ROM" - default 0x40000 - -config CBFS_ROM_OFFSET - hex "offset of CBFS data in ROM" - default 0x40080 - config MTS_DIRECTORY string "Directory where MTS microcode files are located" default "3rdparty/cpu/nvidia/tegra132/current/prod" |