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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2016-04-06 22:07:58 -0500 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2016-04-08 17:21:09 +0200 |
| commit | ba817d0931eb9bbf23d6c09f56f9ea2ba22fdad6 (patch) | |
| tree | 0b0e0e086ba403de436a1f897aae9871bdc33d11 /src/soc/nvidia/tegra132/uart.c | |
| parent | e9205d537ca92e0dfa882a76617e8e9fb664e108 (diff) | |
nb/amd/mct_ddr3: Reenable sync flood after ECC init
The sync flood reset fix in Change-Id: I62d897010a8120aa14b4cb8d096bc4f2edc5f248
and related changes have made it possible to move the sync flood enable statements
back into romstage.
Change-Id: I5a3a4f1621e3048f9dfc159709410be9de6ebece
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14270
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra132/uart.c')
0 files changed, 0 insertions, 0 deletions