diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-08-04 11:40:45 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-25 22:31:38 +0100 |
| commit | bf534180997889bb5feef45178eaf24ef834241a (patch) | |
| tree | 6c754221f82178e20da11d6140ae1b295079158c /src/soc/nvidia/tegra132/soc.c | |
| parent | 8c6d34c1f87f7f48f351e9496ec45985208f5076 (diff) | |
tegra132: output chip information and MTS version
It's helpful to be able to track this information. Therefore
dump it in to the console log.
BRANCH=None
BUG=chrome-os-partner:31126
TEST=Built and ran on rush. Revision information is put out on the
console.
Change-Id: I22e7d222259c1179b90edda6d7807559357f6725
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 18d318331b696a6a32e0a45b8f903eb740896b02
Original-Change-Id: Ic95382126a6b8929d0998d1c9adfcbd10e90663f
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210903
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8905
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/soc.c')
| -rw-r--r-- | src/soc/nvidia/tegra132/soc.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/soc.c b/src/soc/nvidia/tegra132/soc.c index f4ef92894f..84b05078f2 100644 --- a/src/soc/nvidia/tegra132/soc.c +++ b/src/soc/nvidia/tegra132/soc.c @@ -23,6 +23,7 @@ #include <arch/io.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/addressmap.h> +#include <soc/nvidia/tegra/apbmisc.h> static void soc_read_resources(device_t dev) { @@ -79,7 +80,20 @@ static void enable_tegra132_dev(device_t dev) dev->ops = &soc_ops; } +static void tegra132_init(void *chip_info) +{ + struct tegra_revision rev; + + tegra_revision_info(&rev); + + printk(BIOS_INFO, "chip %x rev %02x.%x\n", + rev.chip_id, rev.major, rev.minor); + + printk(BIOS_INFO, "MTS build %08x\n", raw_read_aidr_el1()); +} + struct chip_operations soc_nvidia_tegra132_ops = { CHIP_NAME("SOC Nvidia Tegra132") + .init = tegra132_init, .enable_dev = enable_tegra132_dev, }; |