diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-08-19 15:34:51 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:03:27 +0100 |
| commit | 913067d44f4daa2d58aacac0c33cb2938a0b3740 (patch) | |
| tree | 43c9f4d65aa39ba26e7af274cfba2820bac923c8 /src/soc/nvidia/tegra132/soc.c | |
| parent | 9edf38ef1f366f10f1878cec34918934faf12dac (diff) | |
tegra132: initialize GIC
This provides are barebones initialization for tegra132 GIC
on CPU0. It routes all interrupts to CPU0, moves them all
into group 1, and attempts to allow non-secure access for
all registers (doesn't appear to be implemented, though).
BUG=chrome-os-partner:31449
BRANCH=None
TEST=Built and booted past smp init in the kernel. Timers
appear to be flowing now since jiffies are updated.
Change-Id: Id45c13cc23e50feed3d88da13420c9eb694498a0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 81bad0a53083baa7af0f1fd5f82fef0538ee62df
Original-Change-Id: I69dd9ae53f259e876a9bc4b9d7f65330150d2990
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/212795
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8995
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra132/soc.c')
| -rw-r--r-- | src/soc/nvidia/tegra132/soc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/soc.c b/src/soc/nvidia/tegra132/soc.c index 276ea7b784..13050f6c06 100644 --- a/src/soc/nvidia/tegra132/soc.c +++ b/src/soc/nvidia/tegra132/soc.c @@ -24,6 +24,7 @@ #include <vendorcode/google/chromeos/chromeos.h> #include <soc/addressmap.h> #include <soc/clock.h> +#include <soc/ramstage.h> #include <soc/nvidia/tegra/apbmisc.h> static void soc_read_resources(device_t dev) @@ -59,6 +60,7 @@ static void soc_init(device_t dev) { printk(BIOS_INFO, "CPU: Tegra132\n"); clock_init_arm_generic_timer(); + gic_init(); } static void soc_noop(device_t dev) |